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Stanford CS336 Language Modeling from Scratch | Spring 2026 | Guest Lecture: Dan Fu

Stanford OnlineStanford Online
Education6 min read72 min video
Jun 5, 2026|1,592 views|61|1
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TL;DR

Inference engines, crucial for turning electricity into AI intelligence, face significant bottlenecks. Optimizing these systems requires deep kernel-level understanding, as naive approaches lead to massive inefficiencies and expensive bugs, as seen with the 'parse' architecture offering potential improvements.

Key Insights

1

The transition to AI models is happening faster than anticipated, mirroring the rapid displacement of horses by cars in Manhattan between 1902 and 1912.

2

GPUs are now akin to 'new oil,' with hundreds of billions invested, and inference engines are the critical 'engines' that convert this potential into usable AI output.

3

Serving production traffic with LLMs involves diverse 'workload shapes' with varying input/output token distributions, differing significantly from training data, with coding being a prime example of long input and short output.

4

Continuous batching is key to efficient inference serving, managing multiple requests by interleaving their processing, akin to classic operating system memory management techniques.

5

Mega kernels, by fusing multiple operations into a single kernel, can boost GPU utilization and inference speed by 30-70%, nearing theoretical hardware limits.

6

The 'parse' model, a stabilized loop transformer, shows promise in achieving higher quality with fewer parameters by re-using computations and stabilizing training through dynamic system analysis.

AI's rapid industrial revolution and infrastructure parallels

The capabilities of AI models, spanning text, code, image, and video generation, represent a profound industrial revolution, evolving significantly in just a few years. This advancement is largely driven by scale; models have grown from 100 million parameters in 2018 to trillions of parameters today, enabling new functionalities like conversational AI and complex data analysis. This rapid pace mirrors historical technological shifts, such as the swift adoption of automobiles displacing horses in Manhattan within a decade. The underlying infrastructure for this revolution is increasingly reliant on GPUs, which are now central to the economy, akin to 'new oil.' However, the true value of these GPUs is unlocked by 'inference engines,' which are the software and hardware components that translate raw computational power into intelligent outputs, much like an engine converts oil into kinetic energy.

The intricate journey of a token through the inference pipeline

When a request is made to an AI model, it embarks on a complex journey through an inference engine. First, the request is scheduled to available GPUs. A KV cache is consulted to identify any reusable computations from previous similar requests. The core machine learning code is then executed, which involves computing new tokens and operations. This computation can be parallelized across multiple machines or GPUs, depending on the model size and hardware configuration. These decisions are influenced by evolving hardware capabilities and the specific workload characteristics. The process culminates in generating output tokens which are then processed, potentially involving safety checks, before being returned to the user. This end-to-end pipeline highlights the numerous optimization points and engineering challenges involved in serving AI models efficiently.

Understanding diverse workloads and the prefill-decode dichotomy

Serving AI models in production involves handling a wide array of 'workload shapes' very different from training data. For instance, coding assistance might involve thousands of input tokens and a short output, typical of agentic, turn-based interactions where the model might invoke tools or perform searches iteratively. Conversely, a summarization task might involve processing large documents. The user's interaction pattern also dictates the workload; a quick chat session has different demands than an agentic workflow where the AI works autonomously for extended periods. Key factors defining these workloads include the distribution of input/output tokens, session length, and latency requirements. A fundamental distinction in inference is between 'prefill' and 'decode.' Prefill handles the initial, often large, prompt, which is compute-bound and similar to training operations (without the backward pass). Decode, on the other hand, generates tokens one by one, being heavily memory-bandwidth bound due to the need to load model weights repeatedly for each token. This split often leads to dedicating different hardware resources to prefill and decode to optimize for their distinct computational characteristics.

Continuous batching and KV cache: efficiently managing concurrent requests

To maximize throughput, inference systems employ techniques like continuous batching, where multiple requests are interleaved and processed together. This is crucial for amortizing overheads and improving GPU utilization. A key component enabling this efficiency is the KV cache, which stores intermediate computations (key-value pairs from attention layers) for previously processed tokens. This avoids recomputing these values for subsequent tokens in a sequence or for similar prefixes across different requests. For example, if multiple users start a conversation with 'Hi ChatGPT,' their initial KV cache states can be shared. Similarly, when a user continues a long conversation or refers to a large document, the prefill computation for that context doesn't need to be rerun entirely. The KV cache can be offloaded to different memory tiers (GPU, CPU DRAM, disk) as memory requirements grow, though this introduces latency challenges and necessitates sophisticated cache management strategies, often employing heuristics like Least Recently Used (LRU) or predictive prefetching.

Mega kernels: intensifying GPU utilization for faster inference

A significant bottleneck in LLM inference, particularly during the decode phase, is the underutilization of GPU resources. Standard approaches often involve launching individual kernels for each operation (e.g., attention, feed-forward layers), leading to substantial downtime between kernel launches, tail effects from varying input lengths, and memory loading inefficiencies. 'Mega kernels' address this by fusing multiple operations into a single, highly optimized kernel. This approach treats the GPU as a more integrated processing unit, enabling complex scheduling and overlapping of operations, such as loading weights for one layer while another is still executing. For instance, fusing QKV projections, RoPE scaling, and the initial attention computation can yield substantial speedups. By aggressively combining operations, mega kernels can achieve much higher GPU utilization, reportedly increasing inference speed by 30-70% and approaching theoretical hardware limits (e.g., 72% bandwidth utilization for an H100 GPU). Developing these kernels is labor-intensive, requiring deep hardware and CUDA expertise, and often involves specialized libraries like 'Thunderkittens' to manage the complexity.

The 'parse' architecture: stabilizing loop transformers for better efficiency

The 'parse' model explores a novel architecture based on loop transformers, which aim to improve model quality per parameter by enabling blocks of the transformer to be executed in a loop. This allows for increased computation (FLOPs) without a proportional increase in model parameters, potentially leading to better performance with fewer resources. However, naive implementations of loop transformers often suffer from training instability, characterized by significant loss spikes and divergence. The 'parse' work stabilizes these models by analyzing the dynamic system governing the residual activations. By constraining the feedback ('A' and 'B' matrices) within the recurrent blocks, particularly by ensuring the spectral radius of 'A' is less than one, 'parse' achieves stable training even with aggressive learning rates. Empirically, this stabilization allows the model to achieve higher quality, outperforming previous loop transformer models and strong transformer baselines in benchmarks. Scaling laws suggest that increasing recurrence is beneficial when scaling data, indicating a potential future direction for model training where recurrence is more widely adopted.

System-level optimizations and future research directions

Optimizing AI inference involves a multifaceted approach, from low-level kernel engineering to high-level architectural design. Research into systems like cache-aware prefill-decode disaggregation demonstrates that simple routing logic can yield significant performance gains (up to 40% faster serving) by intelligently handling different request types, such as separating new, high-cost prefills from ongoing, 'warm' conversations. The ongoing development of specialized hardware like Percebus chips and NVIDIA's Grok, designed for specific inference tasks like 'decode,' also highlights the increasing importance of hardware-software co-design. Future research directions include exploring further kernel fusion across different model components and hardware, designing architectures that leverage specialized hardware with limited memory, and understanding the subtle trade-offs between parameter count, data, recurrence, and computational budget ('FLOPs') for optimal model training and deployment across diverse use cases, from agentic workflows to batch processing.

Common Questions

Inference engines are crucial for taking raw electricity and transforming it into useful intelligence by processing model operations. They are the engines that enable language models to generate tokens and provide outputs based on inputs.

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