CPU Summary - Computerphile
Key Moments
Operating systems enable multiple programs to share one CPU using memory mapping and interrupts for multitasking.
Key Insights
Operating systems manage multiple processes (running programs) on a single CPU by creating an illusion of simultaneous execution.
Each process requires its own isolated view of memory, managed by the OS using page tables for memory mapping.
The OS uses supervisor/kernel mode for privileged operations like managing memory and interrupts, while user programs run in a less privileged mode.
Hardware interrupts, triggered by devices like timers, are crucial for notifying the OS to switch between processes.
Context switching involves saving the state of the current process and loading the state of the next process, managed by the OS.
While preemptive multitasking based on timers is common, many programs spend time waiting for external events, naturally yielding the CPU.
INTRODUCTION TO MULTIPROCESSING
Modern computers often have multiple CPUs, but historically, single-CPU systems ran multiple programs concurrently, creating a seamless user experience. This presentation reviews how a simple operating system can manage this, allowing two programs, like a Fibonacci calculator and a Mandelbrot generator, to appear to run simultaneously by leveraging fundamental computer architecture concepts.
MEMORY MANAGEMENT AND PROCESS ISOLATION
Each running program, termed a 'process,' needs its own exclusive view of memory. The operating system achieves this through memory mapping, typically using page tables. For each process, a page table pointer directs the CPU to a set of memory blocks, allowing addresses within the process to correspond to specific physical memory locations. This isolation prevents processes from interfering with each other's data or code.
PRIVILEGED MODES AND SUPERVISOR DUTIES
Operating systems utilize privileged modes, such as supervisor or kernel mode, to perform critical tasks like managing memory and hardware. User programs run in a less privileged mode and are prevented from directly accessing or altering sensitive system structures like page tables. Before relinquishing control to a user program, the OS ensures it switches to the user mode, limiting the program's capabilities.
THE ROLE OF TIMERS AND INTERRUPTS
To enable multitasking on a single CPU, the OS relies on hardware timers and interrupts. A timer is set to expire after a short interval (e.g., a hundredth of a second). When the timer elapses, it triggers an interrupt request (IRQ) to the CPU. This interrupt forces the CPU to halt its current task and transfer control back to the operating system, regardless of what the program was doing.
CONTEXT SWITCHING: THE CORE MECHANISM
When an interrupt occurs, the OS saves the complete state of the interrupted process, including register values and the program counter, not to a general stack but to a dedicated process control block. The OS then updates the page table to reflect the memory view of another process. Finally, it loads the saved state of the next process and resumes execution from where it was last interrupted, creating the illusion of parallel execution.
COOPERATIVE VS. PREEMPTIVE MULTITASKING
Older systems used cooperative multitasking, where programs voluntarily yielded control. This was simpler but prone to system unresponsiveness if a program failed to cooperate. Modern systems predominantly use preemptive multitasking, enforced by the timer and interrupts, which guarantees fair time-sharing. However, many processes spend time waiting for I/O or user input, naturally giving up CPU time, often appearing similar to cooperative behavior.
SWITCHING BETWEEN PROCESSES: THE OS DECISION
Upon receiving an interrupt, the OS decides which process to run next. In simple scenarios with equally prioritized processes, it might cycle through them. More complex OSs use sophisticated scheduling algorithms to manage processes based on priority, resource needs, and other factors. The crucial step is reconfiguring the CPU's memory view (via page tables) to that of the selected process before returning control.
INTERRUPT HANDLING AND STATE RESTORATION
When an interrupt occurs, the CPU saves the current instruction's context and jumps to an OS-defined interrupt handler. This handler then saves the CPU's general-purpose registers and the program counter. Instead of immediately returning to the interrupted program, the OS might switch to another process, restoring its unique set of registers and program counter before returning from the interrupt handler as if it were that process.
MANAGING WAITING PROCESSES EFFICIENTLY
When a process needs to wait for an external event, like keyboard input, the OS marks it as inactive and doesn't schedule it to run. It moves the process to a waiting list. The OS will only reconsider this process once the anticipated event occurs, triggering another interrupt and re-evaluation of the process schedule. This prevents idle processes from consuming CPU time needed by active ones.
OPTIMIZATIONS AND THE COST OF CONTEXT SWITCHING
Context switching involves overhead, including saving and restoring registers. While this process is quick on simpler CPUs, modern CPUs with numerous registers (including floating-point and multimedia extensions) require more complex optimization techniques. However, the time taken for a context switch is generally small compared to the time slices allocated, making multitasking efficient. OSs may disable timers for critical, uninterruptible operations.
EXTERNAL EVENTS AND USER INTERACTION
User interactions, such as typing a key, trigger interrupts that the OS handles. If a shell process is waiting for input, the OS can immediately switch to it. The shell can then interpret commands, like 'kill process,' and initiate OS calls to terminate other processes, reclaim their resources, and manage the system's running applications dynamically.
INTERRUPTS AND ATOMIC OPERATIONS
Interrupts technically occur at the completion of an instruction, allowing for complex out-of-order execution to resolve before switching. However, the OS can interrupt a process mid-operation, which can expose issues for other processes relying on the interrupted process completing an atomic step. Techniques like locks and mutexes are employed to ensure that critical operations complete without interruption, maintaining data integrity across processes.
Mentioned in This Episode
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Common Questions
A single CPU can run multiple programs by rapidly switching between them. This is achieved through preemptive multitasking, where a timer interrupt forces the CPU to pause a running program, save its state, and switch to another program. This switching happens so fast that it appears as if all programs are running simultaneously.
Topics
Mentioned in this video
A tool in Windows for viewing and managing running processes.
Manages processes, memory mapping, and multitasking by setting up page tables, handling interrupts, and switching between running programs.
A routine within the operating system that is executed when an interrupt occurs, responsible for saving the current process state and deciding what to do next.
A command-line utility in Linux for monitoring running processes.
A specific privilege level in the x86 architecture, equivalent to kernel or supervisor mode, used by the operating system.
Manufacturer of computers like the Archimedes, mentioned in the context of early operating systems and cooperative multitasking.
A data structure maintained by the OS that stores the state (registers, program counter) of each running process, used during context switches.
Signals from hardware (like a timer or keyboard) that cause the CPU to stop its current task and execute an interrupt handler in the operating system.
A program used as an example to demonstrate loading and running processes, illustrating how it would execute until it runs out of memory or is interrupted.
A program used as the second example to run concurrently with the Fibonacci program, demonstrating multitasking.
An early version of Microsoft Windows that utilized cooperative multitasking.
Used as an analogy for the hardware timer that triggers interrupts, forcing the CPU to switch tasks.
The interrupt request pin on the CPU, which is activated by external hardware signals (like a timer) to trigger an interrupt.
Modern CPUs mentioned in contrast to the 6502, highlighting the significantly larger number of registers (including floating-point and multimedia) that need to be saved during context switching.
A privilege level in the x86 architecture, typically used by user applications, contrasted with the supervisor mode (ring zero).
A keyboard shortcut commonly used in Unix-like systems to send an interrupt signal to a running process, typically used to terminate it.
A running instance of a program, requiring its own independent view of memory and state management by the operating system.
A pointer used by the operating system to manage a process's independent view of memory, mapping logical addresses to physical memory locations.
Synchronization primitives used in concurrent programming to prevent race conditions and ensure atomic operations when multiple processes share resources or data.
A special privilege mode for the operating system, allowing it to manage hardware and memory mapping, which is taken away from user programs.
An alternative name for supervisor mode, referring to the privileged mode of operation for the operating system kernel.
An older multitasking method where processes voluntarily yield control to the operating system, susceptible to unresponsiveness if a process fails to cooperate.
The process of saving the state of one process and loading the state of another, allowing a single CPU to run multiple processes seemingly simultaneously.
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